BB25.G System level availability
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Title | System level availability |
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Page Title | BB25.G System level availability |
Technology Line | Autonomy of Devices/Energy Efficiency of WSN |
Lead partner | PhLi |
Leader | Willem van Driel |
Contributors | PhLi, NXP AT, HH, VEMCO, Nokia, ITI, GUT, AVL, Tecnalia, Acciona, CISC, VTT |
Related to Use Cases | SCOTT:WP7, SCOTT:WP11, SCOTT:WP13 |
Description | Objective: Set-up minimum efforts for application level fault injection, recoverability and fault tolerant scenarios. The basic idea of Fault Injection Techniques309310 is to emulate (is in fact imitate) both hardware and software to better predict the final product quality and reliability. To make models of the hardware, a good representation of the actual hardware is needed. In many cases, emulation can be used to evaluate the software components without the (final version of the) hardware. To create those models, the software requires the following: Representation of hardware models in transfer functions, derived from hardware simulation tools, physics of failure knowledge, Design of Experiments (DoE), or by using the transfer function from previous hardware versions
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Main output | In SCOTT we will investigate to what level fault injection can contribute to a fast release of large and complex systems. The output will be a description on how one should apply this technique and to what extend it will be succesfull in limiting the validation and verification of these systems. |
BB category | Methodology (for SW/HW development) |
Baseline | State-of-the-art is publisched in Papp & Exarchakos. It contains a proposal for the dependability tree. System level Fault Injection, however, is not part of it. This will be developed in SCOTT |
Current TRL | The current TRL for this Building Block (1-9) is TRL 2 – technology concept formulated. |
Target TRL | TRL 6 – technology demonstrated in relevant environment (industrially relevant environment in the case of key enabling technologies). |